India has achieved its 10-year target of training 85,000 engineers in semiconductor design in just four years, Union Minister for Railways and Electronics and IT Ashwini Vaishnaw said on Monday, underscoring the government’s push to build domestic capabilities under the Semiconductor Mission.
Vaishnaw said Electronic Design Automation (EDA) tools from Cadence, Synopsys and Siemens have been deployed across 315 universities, enabling students to design semiconductor chips. The chips are being fabricated and tested at the Semiconductor Laboratory (SCL) in Mohali, giving students exposure to the full cycle — from design to manufacturing and validation.
Students from institutions across the country — from Assam to Gujarat and from Kashmir to Kanyakumari — are participating in semiconductor design initiatives, he said, calling it a step towards strengthening India’s technological self-reliance.
Citing industry projections, Vaishnaw said the global semiconductor market is expected to grow from about $800–900 billion to $2 trillion, potentially creating demand for nearly 2 million skilled professionals worldwide. He said this presents significant employment opportunities for Indian youth.
Under the proposed Semicon 2.0 phase, the programme will be expanded from 315 to 500 universities to create a wider talent base in semiconductor design, manufacturing, testing and validation.
The minister reiterated the Centre’s commitment to developing a self-reliant semiconductor ecosystem through investments in talent development, infrastructure and industry partnerships.
(ANI)
